(1) Field of the Invention
The invention relates to the manufacture of highly dense integrated circuits and more particularly to the formation of field oxide isolation regions within the integrated circuits by selective oxygen implantation.
(2) Description of the Related Art
In the manufacture of highly dense integrated circuits, individual device structures are typically separated and electrically isolated by means of a field oxide isolation region. The isolation region is typically produced by the exposure of a silicon wafer to an oxidizing atmosphere while using an oxidation mask to protect regions which are not desired to be oxidized. These latter regions will be the location for the active device structures. One widely used technique for creating isolation regions is LOCOS--LOCal Oxidation of Silicon.
In the LOCOS technique, a pad oxide is grown on the surface of a silicon substrate. The pad oxide reduces stresses during field oxidation between the silicon substrate and a subsequently deposited silicon nitride layer. The silicon nitride is deposited by chemical vapor deposition (CVD) on the surface of the pad oxide, and then patterned to create an oxidation mask. The silicon nitride forms an effective mask during field oxidation due to the slow speed with which oxygen and water vapor diffuses in the nitride. The oxidation mask is formed by dry etching the nitride and pad oxide in the region in which it is desired to form the field oxide. An implant is performed in the field region to create a channel-stop doping layer under the field oxide. The field oxide is then grown by wet oxidation, at a temperature of about 1000.degree. C. The masking layer is removed by a wet etch. A sacrificial pad oxide is then formed and removed, to prepare for subsequent formation of the gate oxide.
The LOCOS technology has been used widely, but it presents several drawbacks at dimensions between 1 and 2 micrometers, and for submicron technology the conventional LOCOS cannot be used without significant modification. Among the problems that have been encountered are (1) "bird's beak" formation, (2) nitride-induced defects, (3) "white ribbon" formation, and (4) field oxide thinning. During oxidation, there is significant lateral oxidation encroachment from under the nitride mask, resulting in the formation of a "bird's beak" structure at the perimeter of the field oxide, which reduces the area available in the active region, thus lowering the total number of devices that can be fit onto a single integrated circuit chip. The presence of silicon nitride causes the formation of line and/or planar defects around the bird's beak, which can cause junction failure.
The "white ribbon", caused by the long wet oxidation required to form the thick field oxide, consists of nitrogen or ammonium which diffuses through the silicon oxide (SiO.sub.2) films so that silicon nitride forms at the SiO.sub.2 --Si boundary along the LOCOS edge. This has a masking action against oxidation and consequently the gate oxide of MOS (Metal Oxide Semiconductor) structures may become too thin near the field oxide edge, leading to gate oxide failure. Finally, the thickness of the field oxide in submicron regions of the exposed silicon is significantly less than that in wider spacings. This field oxide thinning can produce problems with respect to field threshold voltages, interconnect-to-substrate capacitance, and field edge leakage.
Workers in the field are aware of these problems. Improvements in the LOCOS technology fall into three broad categories:
(1) An additional barrier to oxygen diffusion is added around the perimeter of the LOCOS stack, usually in the form of a nitride-sidewall spacer, as in SWAMI (Side WAll Masked Isolation). However, the increased process complexity leads to a prohibitive increase in cost. PA1 (2) The pad oxide is eliminated, and a very thin nitride mask used, to minimize the generation of stress-induced defects, using, for example, the SILO (Sealed Interface Local Oxidation) technique. However, there are difficulties in completely removing the nitride layer after field oxidation, and the enhanced stress, induced by the extremely abrupt nature of the boundary between field oxide and active regions, results in poor gate oxide formation and junction integrity. PA1 (3) The pad oxide is replaced with oxynitride, e.g., in the Philips SLOCOS (Suppressed LOCOS) process. However, there are indications that oxynitride is not as effective as the conventional thermal oxide in relieving nitride-induced stresses, and can also result in gate oxide thinning.
Another approach is that described in U.S. Pat. No. 4,912,062 (Verma), in which an impurity such as arsenic, boron, phosphorus or antimony is implanted in the field region prior to field oxidation, to enhance oxide growth. A photoresist mask can be used, instead of nitride, since the field oxidation can be accomplished in a much shorter period of time due to the impurity implant. After field oxidation, the oxide over the active region is removed. An overetch is necessary to insure complete removal of the active region oxide, in preparation for subsequent formation of a gate oxide. However, this overetch can attack the stressed areas at the perimeter of the field oxide, resulting in "bird's neck" morphology and degradation of gate electrode integrity.
A shorter oxidation period can also be obtained by implantation of oxygen in the field region, prior to field oxidation, as described in "Selectively Implanted Oxygen Isolation Technology (SIO)", P. Ratnam et al, Electronics Letters, May 9, 1985, Vol. 21 No. 10, pp. 442-443. Oxygen is selectively implanted to create a damaged Si--SiO.sub.x --Si layer in the field region, which is then thermally oxidized for a short period to form the field oxide. There still exist nitride-induced defects, and "white ribbon" effect problems with this approach.